Steven Xi Chen is an experienced verification engineer with a focus on Ethernet verification. They began their career as an ASIC Engineer at Centec Networks from 2008 to 2010, then transitioned to Atheros Communications as a Senior Engineer from 2010 to 2011. Afterward, they worked at Cisco Systems from 2011 to 2016 as a Design and Verification Engineer, and currently serve as an ASIC Verification Tech Leader at Cisco since 2017.
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