JX

Jun Xia

Principal RFIC Design Engineer

Jun Xia has extensive experience in RFIC design and microwave technology, beginning with a post-doctoral fellowship at the Beijing Institute of Technology focused on wavelet analysis and antenna design. Subsequent roles include research fellowships and engineering positions at prominent institutions such as Nanyang Technological University and CML Micro, where Jun led innovations in satellite communication systems and RF transceivers. Contributions to industry include senior roles at Avago Technologies and Qorvo, where Jun designed high-speed optical transceiver chips and RF front-end modules for 4G/5G technologies. Jun has also co-founded a company and managed various projects in Bluetooth and WLAN transceiver design. An educational background includes a Bachelor's degree in Wireless Communications, a Master's and Ph.D. in Electromagnetic Field and Microwave Technology from Xidian University, and an MBA from the University of Bath. Currently, Jun is a Principal RFIC Design Engineer at CML Micro.

Location

Reading, United Kingdom

Links


Org chart

No direct reports

Teams

This person is not in any teams


Offices

This person is not in any offices