Brice BOISSON

CPU Micro-architect & RTL Design Engineer

Brice Boisson is a CPU micro-architect and RTL design engineer currently working at Codasip, focusing on Load-Store and Data Cache Unit architecture and design. Previously, Brice served as a research assistant at the SEAL Laboratory, contributing to projects in robotics and underwater exploration, and held internships at Arm and Norbert Health, where they developed algorithms and enhanced firmware. Brice earned an engineering degree in computer science from EPITA and has gained international experience in computer science and engineering from Kyung Hee University and Konkuk University.

Location

Nice, France

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