Robert Riglar

Robert Riglar is a seasoned engineer with extensive experience in CPU design and embedded systems. Currently serving as Principal CPU Design Engineer at Codasip since April 2022, Robert specializes in RISC-V CPU design. Prior to this role, Robert worked at Blu Wireless Technology Ltd from July 2015 to April 2022 as MAC HW Team Lead and Principal Design Engineer, focusing on the design of high data rate MACs and in-house RISC-V CPUs, along with team leadership. Previous experience includes a position as Senior Engineer at NVIDIA from August 2010 to July 2015, where Robert contributed to the design and implementation of DMA engines and complex OCP interconnect components. Robert began their career as an R&D Engineer at Evertz from August 2005 to August 2010, specializing in real-time software development for professional broadcast systems.