Tom Aird

Tom Aird has worked at multiple companies in different roles throughout their career. Tom started as a Summer Intern at Infineon Technologies in 2015, where they designed a hardware implementation of a Fast Fourier Transform (FFT) chip for automotive applications. Tom then returned as a Summer Intern in 2016, modeling systems using Simulink in Matlab and converting them into C code for verification. In 2017, they continued as a Summer Intern at Infineon Technologies. From 2018 to 2022, Tom worked as a Verification Engineer at CEVA, Inc., responsible for verifying various blocks of AI and DSP platforms. Currently, they are a Verification Engineer at Codasip, focusing on formal verification of RISC-V IP cores.

Tom Aird attended Birkdale Senior School from 2012 to 2014, where they pursued A-Levels. Tom achieved impressive grades in Maths (A*), Further Maths (A*), Physics (A*), and Spanish (A). Following this, from 2014 to 2018, Tom enrolled at the University of Bristol where they obtained their Master of Engineering (MEng) degree in the field of Electrical and Electronics Engineering.