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XUBIN TAN

Senior R&d Engineer at Codasip

Xubin Tan has a diverse work experience in various roles and companies. In 2009, they worked at the Beijing Institute of Technology, where they focused on FPGA-based real-time systems for radar image processing. From 2012 to 2013, they worked as an IC design and verification engineer at China-Dsp. XUBIN then joined the Barcelona Supercomputing Center in 2014 as a doctorate/investigator in computer architecture, where they conducted FPGA-based prototyping and exploration to accelerate high-performance computing application parallelization with XILINX Ultrascale+ MPSoCs. In 2019, they joined Semidynamics Technology Services as an RTL design and verification engineer, leading the design and functional verification of a two clocks domain memory controller for dual-rank LPDDR4 memory devices. Currently, Xubin Tan works at Codasip as an R&D senior engineer, starting in April 2023.

Xubin Tan completed a Bachelor of Engineering (B.Eng.) degree in Electronic Information Engineering from China Agricultural University from 2005 to 2009. From 2009 to 2012, they pursued a Master of Engineering (M.Eng.) in Information and Communication Engineering at Beijing Institute of Technology. Finally, from 2014 to 2018, Xubin Tan attended Universitat Politècnica de Catalunya, where they obtained a Doctor of Philosophy (PhD) degree in Computer Architecture.

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Timeline

  • Senior R&d Engineer

    April, 2023 - present