Eric Wehage is a Senior Principal RTL Design Engineer at d-Matrix, specializing in digital hardware architecture and RTL design. With extensive experience in ASIC research and development, they contributed to PCI Express technologies at Futurewei Technologies and served as a CPU I/O Architect at Intel Corporation, where they played a key role in integrating PCI Express into server CPUs. Eric holds a Bachelor's degree in Electrical and Electronics Engineering from Oregon State University and is interested in exploring areas such as deep learning networks and robotic delivery systems.
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