Shravya J.

Shravya J. is currently serving as a Staff Design Verification Engineer at d-Matrix since August 2023. Previously, Shravya held the position of Senior Design Verification Engineer at NXP Semiconductors from June 2022 to August 2023, following a role as a Digital IC Design Verification Intern. Concurrently, from February 2022 to May 2023, Shravya worked as a Teaching Associate at San Jose State University, teaching undergraduate students about digital logic circuit design. Shravya's earlier experience includes positions as an Instructional Student Assistant at San Jose State University and as a Wireless System Engineer at NXP Semiconductors from December 2019 to August 2021, as well as an Associate Wireless System Engineer and intern at Marvell Semiconductor. Shravya holds a Master of Science in Electrical and Electronics Engineering from San José State University and a Bachelor of Technology in Electronics and Telecommunications from the National Institute of Technology Raipur.