Chi-Hsueh Lee is a Senior Engineer currently working at 台達電子 as a Packaging Design Sr. Engineer. From 2019 to 2024, Chi-Hsueh was a Research and Development Engineer at 強茂 PANJIT International Inc., where they contributed to various packaging technologies and received multiple patents. They began their career as an Engineer Intern at 恩智浦半導體 in 2018, focusing on bumping technology and inspection data analysis. Chi-Hsueh holds a Bachelor’s degree in Mechanical and Automation Engineering from 國立高雄第一科技大學 and is pursuing a Master of Science at 國立成功大學, expected to complete in 2024.
This person is not in the org chart
This person is not in any teams
This person is not in any offices