Dr David Cabanis

Dr. David Cabanis is an expert in arm processors and embedded systems with over 30 years of experience in electronic design automation (EDA) and hardware verification. Currently employed at Doulos Ltd since 2010, Dr. Cabanis specializes in HDL based designs and verification, particularly in ASIC and FPGA technologies. From 1998 to 2010, Dr. Cabanis served as a senior design and verification consultant at Cadence Design Systems, focusing on hardware verification and system-level modeling. Dr. Cabanis's academic background includes a PhD in Microelectronics from Bournemouth University, where a part-time study involved developing an Object-Oriented implementation of VHDL. Previous roles included VLSI designer/researcher at IBM Havant UK and a VLSI designer at Philips Semiconductors, contributing to the development of VHDL-based models and designs.