Keith Hamer is an experienced ASIC Design Engineer currently employed at Draper since February 2022, with a diverse background in electronic engineering. Previous roles include Field-Programmable Gate Arrays Engineer at BAE Systems, Inc. from January 2020 to February 2022, and FPGA Applications Engineer at Intel Corporation from June 2017 to January 2020. Prior to these positions, Hamer worked as a Design Verification Engineer (contractor) at AMD, and as an ASIC Design Engineer (contractor) at Semtech Corporation. A significant tenure at Toshiba from November 2001 to March 2016 involved responsibilities such as customer support for ASIC designs and formal verification. Additionally, Hamer held positions at Samsung Semiconductor, Oki Semiconductor America, Lockheed Sanders, and Norden Systems, contributing to various aspects of design and customer application support. Educational credentials include a Master of Science degree and a Bachelor of Science degree in Electrical and Electronics Engineering from the University of New Hampshire.
This person is not in any teams
This person is not in any offices