Benjamin Mitchell is an experienced engineer specializing in FPGA development and hardware design. Currently serving as Lead FPGA Engineer at DRW since August 2017, Benjamin has also held roles as Senior FPGA Engineer. Previous experience includes working as a Developer and Junior Developer at Akuna Capital from June 2015 to May 2017, and as a Graphics Hardware Engineer at Intel Corporation from April 2011 to May 2015, where responsibilities involved front-end RTL design using SystemVerilog. Additionally, Benjamin contributed as a mentor at the USC Viterbi School of Engineering, assisting students in logic design and computer architecture. Earlier career experience includes web development and technical support at RedLight Fusion. Benjamin holds both a Master's and Bachelor's degree in Electrical Engineering with a focus on VLSI/IC Design from the University of Southern California.
This person is not in the org chart