Astik Gupta

Astik Gupta has worked for four companies in the past five years. In 2021, they joined EdgeQ Inc. as a Staff Engineer and Member of Technical Staff. In 2020, they worked as a Senior Design Engineer at Samsung Electronics, where they were responsible for PCIe Gen5 End2End Root Ports & Endpoint Device pre-Si DV. In 2018, they joined Intel Corporation as a SoC Design & Development Engineer, Component Design Engineer and Undergraduate Technical Intern, where they were responsible for PCIe Gen4 End2End SOC level Pre-Si DV, PCIe Gen4 End2End EP device Subsystem & SOC level Pre-Si DV, and IOSS DV respectively. In 2016, they worked as a Project Intern at DRDO, Centre for Airborne Systems.

Astik Gupta attended Rashtriya Military School from 2007 to 2012, where they obtained their high school degree. Astik then attended Vellore Institute of Technology from 2014 to 2018, where they obtained a Bachelor of Technology in Electrical, Electronics and Communications Engineering. Additionally, they have a Research Publication from Springer in Control Systems.