JB

John Braswell

Digital Design Engineer at Efficient Computer

John Braswell is a skilled engineer with extensive experience in digital design and FPGA development. Currently serving as a Digital Design Engineer at Efficient Computer since September 2024, John previously held the position of Lead FPGA Design Engineer at Owl Cyber Defense, where responsibilities included designing hardware-based Cross Domain Solutions and developing FPGA test plans. Throughout a diverse career, John has contributed as a Staff Engineer and Senior Design Engineer at CoMira Solutions Inc., enhancing verification test capabilities for high-speed cryptographic accelerators, and as an FPGA/DSP Software Engineer at Tethers Unlimited Inc., integrating VHDL modules into software-defined radio applications. Early career experiences include roles as an FPGA Engineer at Kymeta Corporation and ASIC Engineer II at Honeywell Aerospace, where key projects involved satellite technology and test station design updates. John holds a Master's degree in Electrical Engineering from the University of Rochester and a Bachelor's degree in Electrical Engineering Technology from the Rochester Institute of Technology.

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Pittsburgh, United States

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Efficient Computer

We are building the most energy-efficient programmable computers in the world. Our chips use 100x less energy and enable pervasive intelligence. Efficiency, Generality, and Scale. Intelligence. Everywhere.


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11-50

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