Ramin Farjadrad

Ramin Farjadrad's work experience includes various roles in the technology industry spanning over several decades. Ramin is currently the Founder and CEO of Eliyan Corporation since April 2021. Prior to this, they worked at Marvell Semiconductor from September 2019 to December 2021 as the CTO and VP of Networking/Automotive PHYs. Ramin also served as the Chairman of the Technical Committee at NAV Alliance (Networking in Autonomous Vehicles) from December 2017 to September 2021.

Before their current roles, Ramin co-founded Aquantia Corp. in 2005 and served as the CTO until September 2019. During their time there, they made significant contributions to the development of the industry's first Multi-Gbps Automotive Ethernet PHY and led the IEEE 802.3ch committee in adopting Aquantia's PHY solution. Ramin also played a key role in the development of the first 10-100Gbps copper PHY in Hyper Cloud Connectivity and invented a novel scheme for next-generation Enterprise Ethernet PHYs. Additionally, Ramin led the development of the Enterprise Ethernet PHY to successful production and architected industry-leading low power/area Ethernet 1G-10GBASE-T PHYs.

Prior to Aquantia Corp., Ramin worked at Rambus as a Senior Principal from December 2003 to December 2004, leading the architecture definition and development of an ultra-low-power high-integration serial link interface. Ramin also co-founded Velio Communications Inc. in 1999 and served as the Chief Engineer, where they led the company's research and development of low-power compact multi-Gbps serial transceivers.

Ramin's early career includes a role as a Doctorate Researcher at Stanford Center for Integrated Systems from 1994 to 1999, where they designed and implemented a groundbreaking 4-PAM 10-Gb/s serial link transceiver chip. Ramin also worked as a Design Engineer at LSI Logic from 1996 to 1998, contributing to the architecture and implementation of a 5Gb/s serial link data recovery chip. Additionally, they worked at Sun Microsystems as a Design Engineer in 1994, where they designed a data/clock recovery PLL for digital serial links.

Overall, Ramin Farjadrad has a wealth of experience and expertise in various aspects of the technology industry, particularly in the development of high-speed serial links and Ethernet PHY solutions.

Ramin Farjadrad's education history shows that they pursued a PhD in Electrical Engineering and Computer Science (EECS) at Stanford University from 1996 to 2000. Prior to that, from 1995 to 1996, they completed a Master of Science (M.Sc.) degree in Electrical Engineering at the same institution.