Killian Fedeli has a range of work experience in the field of FPGA development. Killian started as an intern at CNRS in 2013, then worked as an intern at Delphi in 2015, where they focused on implementing Misfire detection in a cylinder using Simulink. In 2016, they worked as an intern at DEGREANE HORIZON, developing a multiprocessor FPGA under a Xilinx card. Killian worked on tasks such as receiving and analyzing Ethernet frames and managing data from an external source. In the same year, they also started working at Elsys Design as an FPGA Developer. Killian'sprojects included programming and implementing FPGA ZYNQ amplifiers to analyze OTN frames and implementing code in VHDL to separate the overhead and payload of the frames. Killian also worked on projects involving FPGA KINTEX Ultrascale for video processing and supported a project on FPGA ARTIX 7, updating the design and analyzing timing, placement, and routing. Killian'sroles at Elsys Design involved creating testbenchs for simulation, developing validation tests, and coding LUA scripts.
Killian Fedeli obtained their Baccalauréat scientifique degree in Physics and Chemistry from Lycée Joliot Curie, where they studied from 2008 to 2011. Following that, they pursued a Diplôme d'ingénieur in Electrical and Electronic Engineering at Institut supérieur d'électronique et du numérique from 2011 to 2016.
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