Chandrakanth Ramesh is currently the Custom Circuits and EMIR Signoff Lead at Ericsson, a position held since 2024. Previously, they served as a Principal Engineer at Qualcomm from 2021 to 2024, and as a Staff Engineer and Senior Staff Engineer at Samsung Austin R&D Center from 2012 to 2019. Chandrakanth also gained extensive experience as a Senior Design Engineer at Intel, where they contributed to the Standard Cell Library Design team from 1999 to 2012, and later worked at NUVIA Inc as a Member of Technical Staff from 2019 to 2024. They hold a Master’s degree in Electrical Engineering from The University of Texas at Austin and a Bachelor’s degree from the Indian Institute of Technology, Madras.
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