Clara Baroncelli

Clara Baroncelli is an experienced professional in the field of ASIC and FPGA development. With a robust background at Ericsson, Clara has held positions such as Head of Department, ASIC Manager, and FPGA Lead Developer. Prior experience at Fujitsu Network Communications includes the role of FPGA Senior Engineer, while earlier tenure at Infinera involved work as an ASIC Designer. Clara’s expertise encompasses significant leadership and technical roles within the telecommunications industry.