Kunal Panchal is a Program Verification Lead at Ericsson, where they drive design verification to closure and ensure quality and timelines for deliveries. With over 15 years of experience in the ASIC and FPGA domains, Kunal has held various roles, including ASIC Engineer, Verification Engineer, and Verification Lead, contributing significantly to the development of verification methodologies and error-correction algorithms. Kunal's educational background includes a Bachelor of Engineering in Electronics and Communication from Dharmsinh Desai University. Previous positions include Sr. Design Engineer at AppliedMicro and Verification Lead at ÅF, among others.
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