Mahesh K

Mahesh K is a Design Verification Engineer currently working at Ericsson, where they develop a comprehensive understanding of 3G/4G/5G RAN architectures and contribute to Ethernet IP verification activities. Previously, Mahesh held roles at companies such as AMD, where they focused on Security IP verification, and Sasken Technologies, where they implemented a Latency Module for performance measurement. Their experience also includes working as an ASIC IP Verification Engineer at Innovative Logic, where they developed test benches for USB technology. Mahesh holds a B.E. in Electronics & Communication from Sai Vidya Institute of Technology.