Tor Caesar

ASIC/FPGA Design & Verification

Tor Caesar has an extensive background in ASIC and FPGA design and verification, beginning in 1988 with programming roles and evolving through various engineering positions across multiple prominent companies. Experience includes significant contributions at Ericsson AB since 2011, focusing on hardware simulation acceleration and emulation. Previous roles include ASIC design and verification at Frontec/Bluelabs, FFV Test Systems, and BitSim AB, along with a foundational role in test and verification engineering at Ericsson Telecom/Ellemtel. Tor Caesar holds a technical high school degree in electronics and telecommunication.

Location

Stockholm County, Sweden

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