Harri Eksymä

Harri Eksymä is a Chief Engineer in FPGA at Etteplan, where they focus on Zynq UltraScale+ RFSoC. Previously, Harri held multiple engineering roles, including Staff Engineer at Ericsson and ST-Ericsson, and Senior Design Engineer at Nokia and Detection Technology. They have extensive experience in RTL design, verification, and synthesis across various platforms and methodologies, including VHDL and Verilog. Harri earned a Master of Science in Electrical Engineering from the University of Oulu.