Grant Bowers is a Firmware Engineer with extensive experience in FPGA and ASIC design and verification. Current employment at Everfox began in January 2025, following a position at Garrison from November 2021 to January 2025, where expertise in VHDL and cocotb was applied. Prior experience includes a role as a Design & Verification Engineer at AWE from September 2017 to November 2021, focusing on FPGA and ASIC design, as well as leading initiatives for SIL 4 subsystems. Earlier professional development involved work as a Graduate Electronics Engineer, concentrating on VHDL design, hardware security research, and LabVIEW development. Grant Bowers holds a BEng in Electronic Engineering (Hons) from Bangor University, obtained in 2017.
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