Siyad Ma

Siyad Ma has extensive work experience in engineering and management roles. Siyad is currently the VP Engineering and Co-founder at Expedera since July 2018. Prior to that, Siyad worked at Cisco as a Principal Engineer from March 2017 to June 2018, and as a Technical Leader from 2007 to 2018. In their roles at Cisco, Siyad was responsible for algorithmic TCAM ASICs and led architectural definition, design, and verification teams for various product lines.

Before joining Cisco, Siyad worked at IDT as a DFT Manager/Principal DFT Engineer from May 2004 to April 2007. Siyad was responsible for managing all DFT activities for PCI Express Switch ASICs and led a team of DFT engineers. Siyad also collaborated closely with frontend and backend designers, verification, and test engineers.

Prior to IDT, Siyad was a Member of Technical Staff/DFT Manager at Zettacom from October 2000 to May 2004. Siyad played a crucial role in the synthesis and timing of Zettacom's generation traffic manager chips and was responsible for the architecture of the DFT logic.

Earlier in their career, Siyad worked at Chameleon Systems as a Member of Technical Staff, where they focused on the architecture and synthesis of the DFT logic for a Reconfigurable SOC.

Before transitioning into industry, Siyad worked as a Consulting Assistant Professor at Stanford University from June 1995 to June 1999. Siyad also gained experience as a Sr. Design Engineer at AMD from June 1995 to March 1999.

Overall, Siyad Ma has demonstrated expertise in engineering, management, and academia throughout their extensive work experience.

Siyad Ma earned a PhD in Electrical Engineering from Stanford University, completing their studies from 1990 to 1995.