Ryan Lu

Ryan Lu is an experienced engineer specializing in packet processing, cryptography, and memory subsystems. They have held significant roles at companies such as F5 as a Senior Principal Engineer, Juniper Networks as a Senior Staff member, and Cadence Design Systems as an Architect. Ryan earned a Master’s degree in Electrical Engineering from the University of Southern California and a Bachelor’s degree from National Tsing Hua University. Their diverse expertise includes designing encryption systems for ASIC and FPGA, as well as developing networking ASICs.