Phat Le

Phat Le is an ASIC Technical Manager with over 10 years of experience in DFT and static timing analysis on turnkey ASIC projects. Previously, Phat held various engineering and managerial roles at Faraday, where responsibilities included leading static timing analysis efforts and defining DFT strategies for testing targets. They also worked as a Hardware Engineer at Renesas Design Vietnam Co., Ltd., focusing on functional verification for automotive microcontrollers. Phat earned a Bachelor's degree in Electrical and Electronic Engineering from HCMC University of Technology and Education.