Bassem Sleiman

Bassem Sleiman is an accomplished FPGA Designer at Fidus Systems since August 2017, where Bassem spearheaded the development of FPGA infrastructure for a startup by establishing a comprehensive build environment and organizing files in Git. Prior experience includes serving as a Senior Design Engineer at IPG-PHOTONICS from January 2011 to July 2017, specializing in FPGA design, verification, timing analysis, and technical documentation, as well as developing SOCs and test benches for OTU2. Bassem's career began as a trainee at Multilane SAL in late 2010 and included IT support roles at INDEVCO industrial development Co in 2008. Bassem holds a Master's degree in Informatique et Telecommunications from Université Antonine, completed in 2010, along with an educational background from Saint Coeurs Ain-Ebel from 1990 to 2005.