Logan Fortune is a Performance Modelling Engineer at Fractile since August 2025, following a progression through various roles at Graphcore from September 2021 to August 2025, including Staff Software Engineer and Graduate Silicon Engineer focused on Central Processing Unit verification. Prior experience includes hardware R&D for a new RISC-V Multi-Core Central Processing Unit at Inria, and hardware security for a modern RISC-V CPU at Thales Digital Identity and Security. Early work at Hurricodes Inc. involved full stack engineering for a computer vision iOS application. Logan holds a Master's degree in Microelectronics and Computer Science from École des Mines de Saint-Étienne and has supplemented education with studies at Georgia Institute of Technology. Contributions to open-source RISC-V projects are notable.
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