Jorge S.

Jorge S. is a Principal ULL Engineer at G-Research since February 2025, with extensive experience in wireless systems and FPGA technology. Previously, Jorge held various roles at IMC Trading, including being on Garden Leave and serving as an FPGA Engineer/Manager. Jorge worked as a Distinguished Engineer at ISCO International, focusing on solutions for wireless service providers, and as a Principal Wireless Systems Architect at Lattice Semiconductor, where leadership of a matrix-based team was key in developing wireless and digital signal processing FPGA IP cores. Other notable positions include Principal Systems Engineer at ArrayComm, where Jorge led a technical team to secure a major contract, and Sr. Wireless Systems Architect at Xilinx, contributing to the 3GPP LTE standardization. Initial engineering experience was gained at Motorola Mobility and IBM Peru. Jorge holds a PhD and MSEE from Purdue University, and a BSEE from Louisiana State University.