Michael Tempelmeier is an accomplished FPGA Engineer at Giesecke+Devrient since July 2021, previously serving as a Senior R&D Specialist in Innovation. Prior to this, Michael held the position of Research and Teaching Assistant at TU München from June 2014 to January 2021, and also worked as a Freelance Teaching Assistant at Technische Universität München Asia from 2016 to 2018. A brief stint as a Visiting Scientist at George Mason University occurred in October 2015. Michael's academic background includes a Doktor-Ingenieur degree, a Master of Science, and a Bachelor of Science, all in Elektrotechnik und Informationstechnik from the Technical University of Munich, completed between 2008 and 2021.
This person is not in the org chart
This person is not in any teams
This person is not in any offices