Dan Z.

Dan Z. is a highly experienced Principal Engineer at GOODIX Technology INC. since March 2020, focusing on RTL design for analog front end control logic, behavioral modeling of analog blocks, lab bring-up using FPGA, and Perl script development for auto-generating RTL, assertion, and UPF files. Previously, Dan served as a Component Design Engineer at Intel Corporation from February 2013 to March 2020, where responsibilities included RTL design, validation, synthesis, timing closure, lab bring-up, system verification using UVM, mixed-signal modeling, and flow development using Perl. Dan holds a Master of Science in Electrical and Computer Engineering from Carnegie Mellon University (2011-2012) and a Bachelor of Science in Electrical and Electronics Engineering from Shanghai University (2007-2011).