Abhinish Anand

Abhinish Anand is an accomplished Silicon Engineer with extensive experience at Google, holding the position of Silicon Engineer II from July 2020 to September 2023 and currently serving as Silicon Engineer III since October 2023. In the previous role, Abhinish contributed as GPU IP DFT Lead, focusing on MBIST and Scan architecture insertion, SSN architecture planning, MBIST repair, and physical aware verification, along with SDC and UPF delivery for timing and power optimization. Abhinish also has a strong academic background, having earned a Master of Technology in Microelectronics and VLSI design from the Indian Institute of Technology, Bombay, with a notable GPA of 9.33, as well as a Bachelor of Technology in Electronics and Communications Engineering from Vellore Institute of Technology, where the GPA was 9.08. Prior academic achievements include a high school degree from SL DAV Public School, Khagaria, and a senior secondary school qualification from Guru Gobind Singh Public School, India.