Akshay Gupta

Akshay Gupta is an experienced hardware engineer with a strong background in ASIC design and verification. Akshay began a career at Open-Silicon, Inc. as a Sr. ASIC Design Engineer I, focusing on timing closure, power analysis, and synthesis activities. Following this, Akshay served as a Senior Member of Technical Staff at Graphene Semiconductor Services Pvt Ltd., consulting for Qualcomm on budgeting flow for IO constraints. At SanDisk, a Western Digital Brand, Akshay held the position of Principal Engineer, managing top-level STA, synthesis, low power implementation, and block place and route (PnR) across various SoC projects from 28nm to 16nm. Currently, at Google, Akshay works as a Hardware Engineer on Tensor SoCs, leading partition STA and sign-off methodologies, emphasizing constraints, timing signoff, and robust flows. Akshay holds a Bachelor's degree in Information Communication Technology from the Dhirubhai Ambani Institute of Information and Communication Technology.