Alisha Parvez

Silicon Design Verification Engineer

Alisha Parvez is an accomplished individual pursuing a Dual Degree in Electronics and Electrical Communication Engineering from the Indian Institute of Technology, Kharagpur, with a notable CGPA of 9.75. Experience includes an internship at Infineon Technologies focusing on area estimation using machine learning techniques, and an internship at Aspire Lab, collaborating with Professor Bibhudatta Sahoo on circuit simulations and PCB design. Alisha has also worked at Google as a Silicon Design Verification Engineer and as a Hardware Engineering Intern, and previously as a Web Development Intern under Professor Atul Jain, designing an educational website for Mechanics of Beam Statics. Academic achievements include high scores in both ICSE and AISSCE examinations from Loreto Day School and Delhi Public School, respectively.

Location

Kolkata, India

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