Anurag Goyal

Anurag Goyal is an experienced engineer with a strong background in design and implementation within the electronics and telecommunications sectors. Anurag served as a Senior Design Engineer at AMD from May 2018 to October 2022, focusing on ARM’s General Interrupt Controller (GIC) IP and real-time error checking logic for the Async Fifo. Previously, Anurag held roles at Reliance Jio Infocomm Ltd. as an Assistant Manager, working on device management tools and network issue resolution, and at Google as an IP Design Engineer starting in October 2022. Anurag's early experience includes a position at Signal Laboratories, Inc. designing debug tools for FPGA signal capture, along with research internships at Technical University of Ilmenau and Solid State Physics Laboratory, where Anurag contributed to innovative projects in collision detection and high-frequency transistors. Anurag holds a Master's Degree in Electrical and Electronics Engineering from the University of Southern California and a Bachelor's Degree from the National Institute of Technology Kurukshetra.