Ashok Kurakula has a robust background in engineering with a focus on power distribution network (PDN) design and reliability verification. Beginning as a Physical Design Engineer Trainee at VEDA IIT in 2017, Kurakula advanced to an Engineer Trainee position at Soctronics, where responsibilities included PDN design and chip reliability analysis. Subsequently, a role as an Engineer 1 at Soctronics involved further specialization in PDN design and verification. From November 2020 to July 2022, Kurakula served as a Senior Engineer at Qualcomm, continuing work in PDN design and reliability verification. Currently, Kurakula is a Silicon Engineer at Google since July 2022. Academic qualifications include a B. Tech in Electronics and Communications Engineering from the Prasad V Potluri Siddhartha Institute of Technology, completed in 2017.
This person is not in the org chart
This person is not in any teams
This person is not in any offices