Avinash Lingamneni is a Machine Learning Hardware Architect at Google, where they lead TPU compute pathfinding and architecture definition, shaping the future of AI accelerators. Previously, they served as the lead architect for SparseCore on TPUs and were involved in microarchitecture and design for various subsystems. Before joining Google, Avinash was a Principal Design Engineer at Cadence Design Systems, focusing on DSP engineering for applications including deep learning and IoT. They earned a Ph.D. in Electrical and Computer Engineering from Rice University, where they contributed to over 25 publications and received a best paper award for their research on inexact computing.
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