Bhavin Patel

Bhavin Patel possesses extensive experience in the field of verification engineering, with a career that began with an internship at eInfochips in August 2012. Over the years, Bhavin has advanced through various roles at eInfochips, ultimately serving as a Senior Technical Lead from April 2018 to the present. Prior to this, Bhavin was a Trainee Engineer and Verification Engineer at eInfochips during a prior tenure. Additionally, experience includes a position as an Automation Engineer at Amtech Electronics from May 2010 to August 2011. Currently, Bhavin serves as a Senior ASIC Design Verification Engineer Silicon at Google starting in October 2023. Educational qualifications include a Master of Technology (M.Tech.) in VLSI and Embedded Systems from UVPCE, completed in 2013, and a Bachelor of Technology (B.Tech.) in Electronics and Communication from UVPCE, completed in 2010.