Boone Severson

Boone Severson is an Architecture and Design Engineer for Accelerator ASICs at Google, with a focus on Tensor Processing Units. They previously served as an Engineering Manager at Intel, where they oversaw validation during the development of the OmniPath HPC Fabric, and as a Vice President at Groq, where they worked on software, infrastructure, and ASIC design. Boone has extensive experience in the HPC industry, having held roles at Cray Inc. as an ASIC Verification Manager and later as Director of Engineering. They earned a Bachelor of Science in Electrical and Computer Engineering from the University of Wisconsin-Madison and are set to lecture on computer architecture in Fall 2024 at the same institution.