Chandrahasa Puduru is a seasoned engineer with extensive experience in full chip timing and physical design. At Intel Corporation, from June 2013 to April 2022, Chandrahasa worked as an engineer focusing on full chip timing and completed a graduate internship on rotary clocking designs and interconnect analysis. Chandrahasa then served at Qualcomm from November 2019 to February 2021, progressing from engineer to senior lead engineer, specializing in physical design and timing closure for various DSPs. Currently, Chandrahasa is a silicon engineer at Google since April 2022. Chandrahasa holds a Master’s degree in VLSI Design from PSG College of Technology, obtained between 2011 and 2013.
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