CHESTER LI

Chester Li has a robust background in hardware engineering and circuit design, spanning multiple companies and over two decades of experience. Notable positions include Member of Technical Staff at Cortina Systems from 2002 to 2007, where responsibilities included PCB signal integrity analysis and backend ASIC design, and as a Hardware Engineer at Google since September 2014. Prior roles included Senior Design Engineer at PMC-Sierra, Design Engineer at Abrizio, and Member of Technical Staff at SGI, focusing on memory and datapath design. Chester Li also contributed to research engineering at D. E. Shaw Research and has experience in high-speed serial link design and integration. Chester Li holds a Master's degree in Electrical Engineering from the University of California, Berkeley.