Ching Hsiang Cheng is a Power Design Engineer at Google since December 2020, focusing on power design for server, storage, switch, and NIC applications. Prior to this role, Ching served as a Principal Engineer at Richtek from May 2020 to November 2020, where responsibilities included the design of multi-phase digital PWM control algorithms for Vcore power. Ching also worked as an Application Engineer at Richtek, evaluating products and developing systems for DC/DC switching power converters and DDR memory power solutions for PC and notebook applications. Ching Hsiang Cheng holds a PhD in Electrical Engineering from National Taiwan University (2016-2020) and has also been a visiting scholar at Virginia Tech (2019-2020).
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