Chintan Patel

Chintan Patel is a Senior Design Verification Engineer at Google, currently leveraging over 10 years of experience in ASIC verification. Previously, Chintan worked at Qualcomm as a Lead Engineer Sr., and held positions at Intel Corporation and PerfectVIPs where they specialized in USB 2.0, AMBA AHB, and Display Port IP verification. Chintan began their career as an intern at Maven Silicon and later served as an ASIC verification engineer, developing extensive expertise in test case creation and functional verification. Chintan earned a Bachelor of Engineering in Electronics and Communication Engineering from L.D.R.P Institute of Technology.