Chirag Jalan

Chirag Jalan is an experienced engineer with a strong background in silicon design and digital systems. With recent positions as a Senior Silicon Design Engineer at AMD and a Design Engineer at Xilinx, Chirag has developed expertise in FPGA prototyping, RTL design using VHDL/Verilog, and the implementation of various DSP blocks. Prior roles include working as an RTL Design Engineer at Logic-Fruit Technologies and a Senior Design Engineer at Analog Devices. Chirag also gained experience as a Summer Intern at Texas Instruments and engaged in robotics competitions during studies at the Indian Institute of Technology, Bombay. Educational qualifications include a Bachelor of Technology in Electronics and Communications Engineering from Motilal Nehru National Institute of Technology and a strong academic foundation from St. Xavier's College and Mother Teresa Public School. Currently, Chirag serves as an ASIC Design Engineer at Google.