Devansh Gulati

Silicon Engineer - DV

Devansh Gulati possesses a solid background in electronics and communications engineering, with a Bachelor of Technology degree from Guru Gobind Singh Indraprastha University and a Master of Science from the University of Florida. Experience includes a Graduate Technical Internship at Intel Corporation focused on Design for Test (DFT) for next-generation Intel server system-on-chip (SoC), a position as SoC Design Engineer involving DFT and integration validation, and an internship at the Indian Institute of Technology, Delhi. Devansh also completed a summer research internship at the National Institute of Technology Meghalaya and currently serves as a Silicon Engineer in Design Verification for Camera Image Signal Processors at Google.

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San Diego, United States

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