Haoxiang Hu

Haoxiang Hu is a Senior DV Engineer at Google, specializing in Camera ISP. They possess 11 years of ASIC design verification experience, having worked on various high-speed networking and video processing ASICs at companies like Juniper Networks, Qualcomm, and Meta. Haoxiang also contributed as a Research Assistant at the University of Rochester, where they developed a 64-bit Bloom Filter using Verilog. They hold a Master of Science in Integrated Circuit Design from the University of Rochester and a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Nanjing University of Science and Technology.