Harsh Sharma is a highly skilled engineering professional with extensive experience in CPU power engineering and silicon architecture. With a Master's degree in Computer Engineering from the University of California, Santa Barbara, and a Bachelor's degree in Instrumentation Technology from Visvesvaraya Technological University, Harsh began a career at Infosys as an Associate Engineer, gaining foundational knowledge in programming and computer concepts. As a Graduate Student at UC Santa Barbara, Harsh implemented testing strategies for processors and verified RTL and Gate-level codes. Subsequent roles at Intel Corporation included positions as a Silicon SoC Architect, Component Design Engineer, and Staff Engineer, driving advancements in firmware development for micro-servers and power management controllers. Currently, Harsh serves as a CPU Power Silicon Engineer at Google, focusing on power modeling and characterization of silicon.
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