Harshini Rayappagari is a Design Verification Engineer with extensive experience in the semiconductor industry. Beginning a career at Wipro Limited from August 2017 to June 2019, Harshini developed a strong understanding of CPRI protocol, verified FPGA modules, and handled Ethernet VIP integration and regression testing. Following this, a role as a Staff Design Verification Engineer at Micron Technology from October 2022 to June 2023 involved expertise in NAND flash memory design and verification through DDR interface, alongside developing complex test bench components using SystemVerilog and UVM. Currently, Harshini is furthering expertise as a Design Verification Engineer at Google since October 2023. Educational qualifications include a Bachelor of Technology in Electronics and Communications Engineering from JNTUH College of Engineering Hyderabad and an Intermediate degree in Maths, Physics, and Chemistry from Sri Chaitanya Junior College.
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