Jeff Lee possesses extensive experience in CPU and DSP architecture, having held key positions at various technology companies. At Silicon Integrated Systems from 2010 to 2013, Jeff served as Department Manager and Audio DSP Architect, specializing in performance modeling, simulation, and RTL design. Subsequently, from 2013 to February 2023, Jeff was at Mediatek as CPU/Vector Processor/DSP Architect, focusing on microarchitectural performance modeling and analysis. Currently, Jeff works at Google, engaging in CPU and machine-learning architecture and performance. Earlier career experience includes being a project manager at Sitronix Technology Corporation and a CPU/microprocessor RTL design engineer at Intel, where Jeff contributed to the HDL design and verification of Intel Pentium processors. Jeff holds degrees from Oregon State University and the University of Washington.
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