Joe Chiu has a robust background in engineering, with experience spanning from quality and reliability roles to process engineering. From March 2016 to September 2018, Joe served as a Quality Engineer at Murata, focusing on quality improvement and customer complaints related to piezo-based SAW filters. Following this, Joe worked at Amkor Technology as a Process Engineer from August 2014 to October 2015, where expertise in WLCSP dicing solutions for low-k wafers was developed. At Intel Corporation, from October 2018 to July 2025, Joe held the position of Quality & Reliability Engineer, contributing to package reliability, supplier management, and data analysis. Currently, since August 2025, Joe is a Hardware Reliability Engineer at Google. Joe graduated with a Bachelor of Engineering degree in Materials Science from National Chung Hsing University in 2013, achieving a GPA of 3.68.
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